Electronics Engineering (VLSI Design) (VLSI) was offered by 23 engineering colleges in Tamil Nadu in TNEA 2025. The General (OC) closing cutoff ran from 195 at PSG Institute of Technology and Applied Research(Autonomous) down to 103 at Muthayammal Engineering College (Autonomous). The full table below is ranked by OC cutoff and shows every community, so you can find the colleges your own cutoff can reach.
In TNEA 2025 the General (OC) closing cutoff for Electronics Engineering (VLSI Design) ranged from 195 at PSG Institute of Technology and Applied Research(Autonomous), Avinashi Road, Neelambur, Sulur, Coimbatore -641062. to 103 at Muthayammal Engineering College (Autonomous), Kakkaveri, Rasipuram (TK), Namakkal District-637408. across 23 colleges. Reserved-category cutoffs (BC, MBC, SC, ST) are lower at every college.
23 engineering colleges in 10 districts admitted students to Electronics Engineering (VLSI Design) through TNEA 2025.
Yes — roughly 4 of the 23 colleges closed at or below 149 for OC in 2025, and more for reserved categories. Check the full table for the exact list.
These are the published TNEA 2025 closing marks — the reference for 2026 counselling. 2026 closing marks appear round by round on the official TNEA portal.
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Source: TNEA 2025 closing marks as published by the Directorate of Technical Education. College Path is an independent guidance platform, not affiliated with Anna University or DoTE.